/opcodes/srl

Description

The contents of operand m are shifted right 1 bit position. The contents of bit 0 are copied to the Carry flag, and bit 7 is reset. Bit 0 is the least-significant bit.

Example

Register B contains the following data. 76534 2 10 10010 1 11 Upon the execution of an SRL B instruction, Register B and the Carry flag now contain: 76534 2 10C 1 001 0 0 11 1

Opcodes