Arithmetic // SLA (Shift Left Arithmetic)
An arithmetic shift left 1 bit position is performed on the contents of operand m. The contents of bit 7 are copied to the Carry flag. Bit 0 is the least-significant bit.
Register L contains the following data. 76534 2 10 10101 0 01 Upon the execution of an SLA L instruction, Register L and the Carry flag now contain: C 76534 2 10 1 01100 0 10
sla b 0xCB20,
2 bytes, 8Tsla c 0xCB21,
2 bytes, 8Tsla d 0xCB22,
2 bytes, 8Tsla e 0xCB23,
2 bytes, 8Tsla h 0xCB24,
2 bytes, 8Tsla l 0xCB25,
2 bytes, 8Tsla (hl) 0xCB26,
2 bytes, 15Tsla a 0xCB27,
2 bytes, 8Tsla (ix+*),b 0xDDCB**20,
4 bytes, 23Tsla (ix+*),c 0xDDCB**21,
4 bytes, 23Tsla (ix+*),d 0xDDCB**22,
4 bytes, 23Tsla (ix+*),e 0xDDCB**23,
4 bytes, 23Tsla (ix+*),h 0xDDCB**24,
4 bytes, 23Tsla (ix+*),l 0xDDCB**25,
4 bytes, 23Tsla (ix+*) 0xDDCB**26,
4 bytes, 23Tsla (ix+*),a 0xDDCB**27,
4 bytes, 23Tsla (iy+*),b 0xFDCB**20,
4 bytes, 23Tsla (iy+*),c 0xFDCB**21,
4 bytes, 23Tsla (iy+*),d 0xFDCB**22,
4 bytes, 23Tsla (iy+*),e 0xFDCB**23,
4 bytes, 23Tsla (iy+*),h 0xFDCB**24,
4 bytes, 23Tsla (iy+*),l 0xFDCB**25,
4 bytes, 23Tsla (iy+*) 0xFDCB**26,
4 bytes, 23Tsla (iy+*),a 0xFDCB**27,
4 bytes, 23T