The contents of the low-order four bits (bits 3, 2, 1, and 0) of memory location (HL) are copied to the low-order four bits of the Accumulator (Register A). The previous contents of the low-order four bits of the Accumulator are copied to the high-order four bits (7, 6, 5, and 4) of location (HL); and the previous contents of the high-order four bits of (HL) are copied to the low-order four bits of (HL). The contents of the high-order bits of the Accu- mulator are unaffected. Note:(HL) refers to the memory location specified by the contents of the HL register pair.
The HL register pair contains 5000h and the Accumulator and memory location 5000h contain the following data. 76534 2 10 10000 1 00Accumulator 76534 2 10 00100 0 00 (5000h) Upon the execution of an RRD instruction, the Accumulator and memory location 5000h now contain: 76534 2 10 10000 0 00Accumulator 76534 2 10 01000 0 10 (5000h) Bit Set, Reset, and Test Group The following bit set, reset, and test group instructions are each described in this section. Simply click to jump to an instruction’s description to learn more. BIT b, r – see page 243 BIT b, (HL) – see page 245 BIT b, (IX+d) – see page 247 BIT b, (IY+d) – see page 249 SET b, r – see page 251 SET b, (HL) – see page 253 SET b, (IX+d) – see page 255 SET b, (IY+d) – see page 257 RES b, m – see page 259