This 2-byte instruction transfers a byte of data from the memory location addressed by the contents of the HL register pair to the memory location addressed by the contents of the DE register pair. Then both of these registers, and the BC (Byte Counter), are decre- mented. If decrementing causes BC to go to 0, the instruction is terminated. If BC is not 0, the program counter is decremented by two and the instruction is repeated. Interrupts are recognized and two refresh cycles execute after each data transfer. When the BC is set to 0, prior to instruction execution, the instruction loops through 64 KB. For BC ≠ 0:


The HL register pair contains 1114h, the DE register pair contains 2225h, the BC register pair contains 0003h, and memory locations contain the following data. (1114h) contains A5h (2225h) contains C5h (1113h) contains 36h (2224h) contains 59h (1112h) contains 88h (2223h) contains 66h Upon the execution of an LDDR instruction, the contents of the register pairs and memory locations now contain: HL contains 1111h DE contains 2222h DC contains 0000h (1114h) contains A5h (2225h) contains A5h (1113h) contains 36h (2224h) contains 36h (1112h) contains 88h (2223h) contains 88h