The contents of Register C are placed on the bottom half (A0 through A7) of the address bus to select the I/O device at one of 256 possible ports. Register B can be used as a byte counter, and its contents are placed on the top half (A8 through A15) of the address bus at this time. Then one byte from the selected port is placed on the data bus and written to the CPU. The contents of the HL register pair are then placed on the address bus and the input byte is written to the corresponding location of memory. Finally, the byte counter is decre- mented and register pair HL is incremented.
Register C contains 07h, Register B contains 10h, the HL register pair contains 1000h, and byte 7Bh is available at the peripheral device mapped to I/O port address 07h. Upon the execution of an INI instruction, memory location 1000h contains 7Bh, the HL register pair contains 1001h, and Register B contains 0Fh.