/opcodes/im

Control Flow // IM (Interrupt Mode)

Description

The IM 0 instruction sets Interrupt Mode 0. In this mode, the interrupting device can insert any instruction on the data bus for execution by the CPU. The first byte of a multi-byte instruction is read during the interrupt acknowledge cycle. Subsequent bytes are read in by a normal memory read sequence.

Example

Condition Bits Affected None.

Opcodes

• im 0 0xED46, 2 bytes, 8T
• im 0/1 0xED4E, 2 bytes, 8T
• im 1 0xED56, 2 bytes, 8T
• im 2 0xED5E, 2 bytes, 8T
• im 0 0xED66, 2 bytes, 8T
• im 0/1 0xED6E, 2 bytes, 8T
• im 1 0xED76, 2 bytes, 8T
• im 2 0xED7E, 2 bytes, 8T